An information processing device having a reconfiguration device, a configuration code memory, and a reconfiguration device controller has been known (see Patent Document 1). The reconfiguration device changeably achieves a circuit for executing a desired task according to configuration codes. The configuration code memory stores configuration codes for achieving a plurality of circuits each having a different characteristic for every task executed in the reconfiguration device. The reconfiguration device controller controls a load of configuration codes with respect to a reconfiguration device which selects an appropriate circuit to be executed by the reconfiguration device according to the operating state of the system from among the plurality of circuits each having a different characteristic.
Further, a data processing device having a reconfigurable processing device, a monitoring means, and a reconfiguration means has been known (see Patent Document 2). In the reconfigurable processing device, a plurality of data processing units to which data are inputted separately from each other so as to perform data processing are provided by reconfiguration of logic specifications. The monitoring means monitors for a finish of data processing in the data processing units. Based on a monitoring result from the monitoring means, the reconfiguration means does not reconfigure logic specifications of a data processing unit which is processing data but reconfigures logic specifications of one or more data processing units which finished processing, so as to provide one or more new data processing units which are to perform the next data processing.    Patent Document 1: Japanese Laid-open Patent Publication No. 2007-179358    Patent Document 2: Japanese Laid-open Patent Publication No. 2009-129163
When there is not a sufficient space area in the reconfigurable circuit, a new circuit cannot be reconfigured in the reconfigurable circuit. In this case, it is possible that the next processing is forced to wait until the sufficient space area becomes available, resulting in decrease of the efficiency of using the reconfigurable circuit.